Step Response In a Hybrid Lumped-Distributed Network

Introduction Transmission line theory has been around for more than a century. However, the distributed nature of it has kept it interesting for all these years. One interesting subject is the step response in a hybrid lumped-distributed network. While for a purely lumped network it is quite easy to analyze and derive the response equation, for a distributed or a […]

Behavior of Oscillators under Injection Pulling

Oscillators are integral parts of many electronic devices. Majority of fundamental signal processing operations such as frequency translation, synchronization, and timing, require stable clocks derived from an electrical oscillator. An oscillator is generally susceptible to any external periodic signal whose frequency is close to the oscillation frequency or its integer harmonics. Without the loss of […]

Sample-Timing Skew in Time Interleaved ADC

In digital communication systems, Analog-to-Digital Converter (ADC) is the main interface between the analog domain and the digital domain. The continuous rising demand for high data rate communication systems has been creating the need for wide-band ADCs with a high sampling rate and high accuracy. These ADCs need to achieve high speed and high resolution […]

MATLAB tips and tricks: part 2

This is the second part of our "MATLAB tips and tricks" series. As we also mentioned in part 1, MATLAB is the programming language of choice for many engineers, scientists, data analysts, and more. In this post we introduce some interesting MATLAB tips and tricks. They can be used to make writing code easier and shorter, also to write codes that run faster.

Single Carrier FDMA Modulation Scheme

Single Carrier Frequency Division Multiple Access (SC-FDMA) is an alternative modulation scheme to Orthogonal Frequency Division Multiple Access (OFDMA) employed in the uplink Long Term Evolution (LTE) cellular wireless communications systems. The SC-FDMA has similar performance and essentially the same overall complexity as OFDMA system. The OFDMA waveform exhibits a high Peak-to-Average Power Ratio (PAPR), requiring the power amplifier to operate with a large back-off from their peak power. This results in the power amplifier to operate with low efficiency and places a significant burden on battery-limited mobile handsets.

Stochastic Computing's Comeback: A Viable Approach for Nanoscale Technologies?

hen we first learn about digital microsystems, we often start by figuring out how information can be represented using bits of information, 0 and 1. Representing any number larger than 1 or any fraction requires that we use several bits. Then, we usually proceed to learn about sign-and-magnitude and 2's complement notations. We may also […]

Cable Transfer Function calculation based on ABCD matrix

The ABCD representation for a two-port circuit is very convenient for the calculation of cable transfer function. In this post we show how to compute the cable transfer function for a simple transmission line as well as a simple cable with one bridge-tap connection. The method can be extended to more complex cases very easily.

3 Great online schools: an educational revolution

With the advances in technology, come significant advances in education. One of the greatest advancements and themes in the education world is the creation of free online schools. The free online schools are essential for democratization of education. And the amazing fact is that not only these schools are free, but they have a surprisingly high quality content.

MATLAB tips and tricks: Part 1

MATLAB is the programming language of choice for many engineers, scientists, data analysts, and more. In this post we introduce some interesting MATLAB tips and tricks. They can be used to make writing code easier and shorter, also to write codes that run faster.

Dual Loop Clock and Data Recovery

Dual-loop clock and data recovery (CDR) systems are widely used in today’s gigabit wireline communications. Figure 1 shows the architecture of a dual-loop CDR, consisting of a phase locked loop (PLL) and CDR. The PLL creates a quadrature clock at the data rate of the input data $D_{in}$ , while the CDR tracks the data phase along each lane of the serial link. The data recovery loop is based on a phase detector (PD), a finite state machine (FSM), and a phase interpolator (PI). A bang-bang PD creates "up" and "down" signals based on the phase of the clock in respect to the input data.